Serving Eastern Massachusetts
Course Description
| Course Name: | C5 - Low Power Design Essentials |
| Time & Date: | 7:00 – 9:00 PM, Tuesdays, April 3, 10 & 24 |
| Location: | Holiday Inn Select Hotel, 15 Middlesex Canal Park Road, Woburn, MA |
| Speaker: | Jerry Frenkil |
Course Description
Power consumption has become a limiting factor in product design. For wireless devices, power consumption limits battery life and hence product appeal. For tethered devices, power consumption limits functionality due to constraints on heat generation and power availability.
This short course will survey the wide variety of Low Power Design issues, techniques, and methodologies that have been developed in response to these challenges. It will provide electronics professionals a clear understanding of the design approaches and tradeoffs involved in developing power efficient devices and systems, covering a broad range of approaches from transistors to system architectures.
Session 1: Introduction and Circuit Level Power Optimizations
- Motivations and Trends
- Power and Energy Basics
- Design Time, Runtime, and Standby techniques
- Circuit level power optimization
- Interconnect and clock power optimization
Session 2: Logic and System Level Power Optimizations
- Architecture, Algorithm, & system level power optimization
- Memory power optimization
- Circuits & Systems for Standby Power Optimization
- Circuits & Systems for Runtime Power Optimization
Session 3:
- Ultra Low Power / Voltage Design
- Low Power Design Methodologies
- Power Integrity Methodologies
- Summary and Perspective
Target Audience
Systems and ASIC developers, applications engineers, and design managers needing to understand how to estimate, analyze and optimize power consumption.
Gain a broad, fundamental understanding of power consumption and how to manage and optimize it during different design phases and in different modes of system operation.
Biography
Jerry Frenkil is Principal of Frenkil Engineering, an engineering services firm focused upon Low Power Design. He has over 25 years experience in the electronics industry, including positions at Mostek, Prime Computer, VLSI Technology, Sente, and Sequence Design, where he was CTO and VP of R&D. Jerry has multiple patents and publications, including chapters in four books. Jerry has a BS in Electrical Engineering from the University of Texas.
Slides will be distributed. Course will be based upon the text, “Low Power Design Essentials”, by Jan Rabaey. (Lecturer co-authored one of the chapters in the text.)
Decision (Run/Cancel) Date for this Courses is Friday, March 23, 2012
FEES
Payment received by March 20: IEEE Members $225
Payment received by March 20: Non-members $265
Payment received after March 20: IEEE Members $265
Payment received after March 20: Non-members $295
Register online here.