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Course Description

Course Name: Introduction to Multicore Programming
Time & Date: 7 - 9 PM, Tuesdays, March 30, April 6, 13, 20, 27
Location: Holiday Inn Select Hotel,  15 Middlesex Canal Park Rd, Woburn, MA
Speaker: James T. Demers, Physical Sciences Inc.

Class Description:

These lectures lay the foundation of multicore programming, covering the reasons for using it, challenges in system design, and software details.  This begins by discussing platform-independent concepts, parallel programming constructs, and the decisions required for optimal use of available processing resources.  A more in-depth presentation using the Cell BE processor as an example illustrates many of the fundamental ideas for performance improvement.  Finally, a look at two competing concepts, lock-based and lock-free threads, shows the paths available as multicore programming matures.

There are no labs or required reading, but code will be examined in detail to illustrate the presented concepts.

Prerequisites:

Programming familiarity in C

Target Audience:

Software developers using multiple processors, system engineers evaluating multicore solutions, and all engineers using newer processor technology.

PRELIMINARY DETAILED AGENDA:

Class 1 - Overview of Multicore Processing

Introduction to Multicore

Parallel Processing

Symmetric Multi-Processing

Asymmetric Multi-Processing

Valid Single-Core Concepts

Granularity

Performance Expectations

Benefits

Hurdles

Class 2 - Symmetric Multicore Processing

Overview of SMP Resources

Program Co-ordination

Processes

Threads vs. Processes

Class 3 - Asymmetric Multicore Processing

Overview of AMP Resources

Available Software Packages

Asymmetric C Programming

Example: CUDA

Class 4 - In-depth Session: Programming Cell BE Processors

Introduction to the Cell BE Architecture Computational Processing Considerations Data Movement Considerations Programming the PPE Programming the SPEs Performance Expectations

Class 5 - POSIX Threads and Lock-free Programming

POSIX Thread Introduction

Thread Pitfalls

POSIX Thread Example: Banking with ATMs

Lock-free Overview

Contrasting Lock-free vs. Lock-based

Lock-free Example: Linked List

Handouts: Provided at each lecture, and available electronically

Lecturer’s Biography:

A graduate of MIT, James T. Demers has been developing parallel processing applications for 18 year at companies such as MIT Lincoln Laboratory, Mercury Computer Systems, and Physical Sciences.  He has experience programming several types of processors, such as PowerPC, TI DSP, and the Cell BE, for image and signal processing applications. He can be reached at ieee@demers-family.org.

Decision (Run/Cancel) Date for  this Courses is Friday, March 19, 2010

FEES

Payment received by March 16: IEEE Members $295

Payment received by March 16: Non-members $345

Payment received after March 16: IEEE Members $345

Payment received after March 16: Non-members $395

On-line registrations to this course is closed. You may register from 6:30PM - 7:00PM, Tuesday, March 30, 2010 at the Holiday Inn Select, 15 Middlesex Canal Park Road, Woburn, MA or by calling the IEEE Boston Section office at 781-245-5405.