Course Description

Course Name:	SMP and Multicore Applications in Embedded Linux
Time & Date:	6 - 9PM, Thursdays, Nov. 18, Dec. 2, 13 & 16 (Note: Dec. 13 is a Monday)
Location:	Holiday Inn Select Hotel, 15 Middlesex Canal Park Road, Woburn, MA
Speaker:	Mike McCullough, CEO, RTETC

Course Summary:

This technical training course provides training in Symmetric MultiProcessing (SMP) and Multicore Applications design using Embedded Linux Distributions. The course focuses on the design and development of Multicore applications in an Embedded SMP Linux context. The first part of the course focuses on acquiring an understanding of the basics of existing Multicore architectures and the difficulties associated with designing software applications for these architectures. The latter part covers the design, porting and performance optimization of Multicore applications and device drivers in Embedded SMP Linux

Who Should Attend

The course is designed for real-time engineers who are building Embedded Linux solutions on Multicore platforms. It is also targeted at experienced developers requiring a refresher course on Embedded SMP Linux. This course will clearly demonstrate both the strengths and weaknesses of Multicore architectures and applications in Embedded Linux.

Course Objectives

To provide a basic understanding of existing Multicore architectures
To gain an understanding of the complexities of Multicore Applications design
To learn the methods of designing Multicore applications and drivers in Embedded SMP Linux
To give students the confidence to apply these concepts to their next Multicore project using Embedded SMP Linux

Course Schedule Day 1

The Basics

Linux and Multicore Terminology, History and Versioning

The Linux Community: Desktop & Embedded

The GPL

Multicore and SMP Linux References (Books and Online)

Getting Started

Multicore Usage in Embedded Systems

The Myths of Multicore

Multicore Design Challenges and Issues

Linux 2.6 and Multicore

Existing Multicore Architectures

The AMD Multicore Opteron

The Sun UltraSparc T1

The IBM Cell Broadband Engine (CBE)

The Intel Core 2 Duo

The Freescale 8641

The Tilera TILEPro64

Mutual Exclusion, Locking and Synchronization

Mutexes

Spinlocks and Contention

Atomic Synchronization Operations

Monitors and Blocking Synchronization

Barriers

Concurrency

Concurrent Objects, Queues and Stacks

Multiprocessing and Parallel Programming

Multithreading

Communication and Synchronization of Concurrent Tasks

Modelling Concurrent Software Systems

Memory and Multicore

Local Memory

Shared Memory

Memory Pools

Transactional Memory

Cache Coherency

Course Schedule Day 2

Multicore Operating Systems

The Role of the Operating System

Moving from Tasks to Processes and Threads

The Applications Programmer’s Interface

POSIX Process and Threads Management

SMP Linux Basics

Multicore Software Design

Natural Parallelism

Profiling and Multicore Designs

Scalar Optimization and Usability

Data Decomposition

Functional Decomposition

Parallelization

Inter-Core Communications

Priority Queues and Work Distribution

Tools for Multicore Software Design

Virtualization and Partititioning

OpenMP

Pthreads and Win32 Threads

Intel Thread Building Blocks (TBB)

Parallel Application Design Layers (PADL)

Predicate Breakdown Structure (PBS)

UML for Concurrent Design

Concurrency Models

Using gprof and oprofile in Linux

Intel VTune

Intel Thread Profiler

Course Schedule Day 3

Process & Threads Management in SMP Linux

Creating and Managing Processes and Threads

Thread-Specific Data (TSD)

SMP Threading Considerations

Scheduling in SMP Linux

The O(1) Scheduler

The Completely Fair Scheduler (CFS)

The Anticipatory I/O Scheduler

The Completely Fair Queue Scheduler (CFQ)

SMP Scheduling

Synchronization in SMP Linux

Via Global Data

Via Semaphores, Files and Signals

SMP Synchronization

Atomic Operations

GCC Intrinsics

Barriers

Inter-Process Communications (IPC) in SMP Linux

Message Queues and Semaphores Revisited

Pipes, FIFOs and Futexes

Remote Procedure Calls

Networking

SMP IPC Considerations

Error Handling in SMP Linux

errno and perror

strerror and strerror_r

oops, panics and Segmentation Faults

Memory Management and Paging in SMP Linux

Demand Paging and Virtual Memory

Per-CPU Allocations

Memory in Embedded Systems

Cache Coherency in SMP Linux

Instruction Cache Coherency

Data Cache Coherency

Dynamic Distributed Cache (DDC)

Debugging SMP Linux Applications

GDB and Multithreaded Debugging

Command-Line Debug in SMP Linux

Using the Eclipse IDE with Multithreaded Applications

Libraries in SMP Linux

Course Schedule Day 4

BSP Support for Embedded SMP Linux

Architecture-Independent Support

Architecture-Dependent Support

Memory Architecture

Atomic Operations

Resource Management

Device Drivers in Embedded SMP Linux

Multithreaded Device Drivers

Design for Concurrency

Shared Resources

Caching Issues

Interrupt Control

Preemption and Reentrancy

Networking in Embedded SMP Linux

Network Device Drivers

Sockets and Threads

Caching in Networked Filesystems

Parallelizing Networked Applications

Packet Flow Architectures

Porting Applications to Embedded SMP Linux

An Iterative Process

Single-Core Porting

Scalar Optimization and Profiling

Identifying Parallelization Options

Parallel Optimization and Profiling

Manual Adaptation

Performance Monitoring and Improvement

Multicore and Embedded SMP Linux Trends

New Hardware Architectures

64 Bit Processing

Development, Monitoring and Testing

Some Final Recommendations

Lecturer

Mike McCullough is President and CEO of RTETC, LLC. Mike has a BS in Computer Engineering and an MS in Systems Engineering from Boston University. A 20-year electronics veteran, he has held various positions at Embedded Planet, Wind River Systems, Lockheed Sanders, Stratus Computer and Apollo Computer. RTETC, LLC is a provider of Eclipse-based development tools, training and consulting for the embedded systems market.

Decision (Run/Cancel) Date for this Courses is Tuesday, November 9, 2010

FEES

Payment received by November 4: IEEE Members $390

Payment received by November 4: Non-members $410

Payment received after November 4: IEEE Members $410

Payment received after November 4: Non-members $435